[X-bit labs] AMD's Jaguar core will support AVX, AES

本帖最後由 willy930 於 2012-7-25 10:37 編輯
Advanced Micro Devices recently disclosed to the GCC community how to enable support for its next-gen low-power micro-architecture code-named Jaguar, which the chip designer calls "btver2" internally. Based on the information released by AMD, the Jaguar low-power micro-architecture will support a set of instructions found in high-performance Bulldozer/Piledriver sores, including SSE4.1, SSE4.2, AES, PCLMUL, AVX, BMI, F16C as well as MOVBE.


Interesting thing is, X-bit labs thinks Jaguar will be very Bulldozer like.

Nonetheless, it is possible that AMD will change the design of Jaguar rather significantly compared to Bobcat and will move towards modular Bulldozer-like approach. In addition, Jaguar cores will be able to address 2MB of cache, not 512KB like Bobcat, which likely points to unified level-two (L2) cache of the new x86 core.


Hope Jaguar's IPC will be very close to K10.

[EDIT]
Source: http://www.xbitlabs.com/news/cpu ... w_Instructions.html
[/EDIT]

-> IPC will be very close to K10
clock speed ?

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-> IPC will be very close to K10
clock speed ?
usei 發表於 2012-7-25 11:35

You may expect ~2 Ghz for 4 cores in 25w SKUs.
It should clock a bit higher than Trinity LV 25W, I think.

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how about CPU performance?
Trinity 25W or Jaguar 25W better?
vcfirstben_II 發表於 2012-7-25 13:26
Uncertain at this moment.

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本帖最後由 Puff 於 2012-7-25 18:18 編輯
唔會出到 25W 掛
以 AMD 個策略黎睇,Bobcat / Jaguar 都係 18W 或以下
clock up 到 25 W 等同18W 版超少 ...
wilsonkf 發表於 2012-7-25 17:00

The 2013 AMD Ultrathin Lineup consists of Kabini (9-25W) and Kaveri (15-35W).
You may refer to the AFDS12 closing keynote given by Mark Papermaster.

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